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?2003 fairchild semiconductor corporation www.fairchildsemi.com rev.1.0.1 features ? burst mode operation to reduce the power consumption in the standby mode ? external pin for synchronization and soft start ? wide operating frequency range up to 150khz ? low start-up current (max:80ua) ? low operating current (max:15ma) ? pulse by pulse current limiting ? over voltage protection (auto restart mode) ? over load protection (auto restart mode) ? abnormal over current protection (auto restart mode) ? internal thermal shutdown (auto restart mode) ? under voltage lockout ? internal high voltage sensefet application ? monitor smps description FS8S0765RCB is a fairchild power switch (fps) that is specially designed for off-line smps of crt monitor with minimal external components. this device is a current mode pwm controller combined with a high voltage power sensefet in a single package. the pwm controller features integrated oscillator to be synchronized with the external sync signal, under voltage lockout, optimized gate driver and temperature compensated precise current sources for the loop compensation. this device also includes various fault protection circuits such as over voltage protection, over load protection, abnormal over current protection and over tem- perature protection. compared with discrete mosfet and pwm controller solution, fps can reduce total cost, compo- nent count, size and weight simultaneously increasing effi- ciency, productivity and system reliability. this device is well suited for the cost effective monitor power supply. to-220-5l 1 1. drain 2. gnd 3. v cc 4. feedback 5. sync internal block diagram 9v/15v 3 1 2 4 5 vref internal bias s q q r osc vcc vref i delay i fb v sd tsd vovp vcc vocl s q q r r 2.5r uvlo reset (vcc<9v) vcc drain soft start & sync fb gnd aocp gate driver vcc good leb pwm vref vref burst mode detector vfb<0.8v vss>3v no sync burst mode controller sync detector FS8S0765RCB fairchild power switch(fps)
FS8S0765RCB 2 pin definitions pin number pin name pin function description 1drain high voltage power sensefet drain connection. this pin is designed to drive the transformer directly. 2 gnd this pin is the control ground and the sensefet source. 3vcc this pin is the positive supply input. this pin provides internal operating current for both start-up and steady-state operation. 4 feedback this pin is internally connected to the inverting input of the pwm comparator. for stable operation, a capacitor should be placed between this pin and gnd. if the voltage of this pin reaches 7.5v, the over load protection is activated resulting in shutdown of fps. 5 soft start & sync this pin is for soft start and synchronization to the external sync signal.
FS8S0765RCB 3 absolute maximum ratings (ta=25 c, unless otherwise specified) notes: 1. tj=25 c to 150 c 2. repetitive rating: pulse width limited by maximum junction temperature 3. l=14mh, starting tj=25 c 4. l=13uh, starting tj=25 c parameter symbol value unit drain-gate voltage (r gs =1m ? )v dgr 650 v gate-source (gnd) voltage v gs 30 v drain current pulsed (2) i dm 28 a dc single pulsed avalanche energy (3) e as 370 mj single pulsed avalanche current (4) i as 17 a continuous drain current (tc = 25c) i d 7a dc continuous drain current (t c =100 c) i d 4.5 a dc supply voltage v cc 35 v input voltage range v fb -0.3 to vcc v v s_s -0.3 to 10 v total power dissipation p d (watt h/s) 145 w derating 1.16 w/ c operating junction temperature t j +150 c operating ambient temperature t a -25 to +85 c storage temperature range t stg -55 to +150 c
FS8S0765RCB 4 electrical characteristics (sensefet part) (ta=25 c unless otherwise specified) note: (1) pulse test : pulse width 300 s, duty 2% parameter symbol condition min. typ. max. unit drain source breakdown voltage bv dss v gs =0v, i d =250 a 650 - - v zero gate voltage drain current i dss v ds =650v, v gs =0v - - 200 a v ds =520v v gs =0v, t c =125 c - - 300 a static drain source on resistance (1) r ds(on) v gs =10v, i d =3.5a - 1.4 1.6 ? forward transconductance gfs v ds =40v, i d =3.5a - 8 - mho input capacitance ciss v gs =0v, v ds =25v, f = 1mhz - 1415 - pf output capacitance coss - 100 - reverse transfer capacitance crss - 15 - turn on delay time td(on) v dd =325v, i d =6.5a (mosfet switching time is essentially independent of operating temperature) -25- ns rise time tr - 60 - turn off delay time td(off) - 115 - fall time tf - 65 - total gate charge (gate-source+gate-drain) qg v gs =10v, i d =6.5a, v ds =325v (mosfet switching time is essentially independent of operating temperature) -40- nc gate-source charge qgs - 7 - gate-drain (miller) charge qgd - 12 -
FS8S0765RCB 5 electrical characteristics (continued) (ta=25 c unless otherwise specified) note: 1. these parameters, although guaranteed at the design, are not tested in mass production. 2. these parameters, although guaranteed, are tested in eds(wafer test) process. parameter symbol condition min. typ. max. unit uvlo section start threshold voltage v start v fb =gnd 14 15 16 v stop threshold voltage v stop v fb =gnd 8 9 10 v oscillator section initial frequency f osc -182022khz voltage stability f stable 12v vcc 23v 0 1 3 % temperature stability (1) ? f osc -25 c ta 85 c0 510 % maximum duty cycle d max -929598% minimum duty cycle d min ---0% feedback section feedback source current i fbso v fb =gnd 0.7 0.9 1.1 ma feedback sink current i fbsi v fb= 4v,v cc =19v 2.4 3.0 3.6 ma shutdown feedback voltage v sd vfb 6.9v 6.9 7.5 8.1 v shutdown delay current idelay v fb =5v 1.6 2.0 2.4 a protection section over voltage protection v ovp vcc 27v 34 37 - v over current latch voltage (2) v ocl - 0.95 1.0 1.05 v thermal shutdown temp.(1) t sd - 140 160 - c sync & softstart section softstart vortage v ss vfb=2 4.7 5.0 5.3 v softstart current i ss vss=0v 0.8 1.0 1.2 ma sync high threshold voltage v sh vcc=16v,vfb=5v 6.7 7.2 7.9 v sync low threshold voltage v sl vcc=16v,vfb=5v 5.4 5.8 6.2 v
FS8S0765RCB 6 electrical characteristics (continued) note: 1. these parameters indicate inductor current. 2. these parameters are the current flowing in the control ic. parameter symbol condition min. typ. max. unit burst modesection(dpms mode) burst mode high threshold voltage v buh vfb=0v 11.6 12 12.6 v burst mode low threshold voltage v bul vfb=0v 10.6 11 11.6 v burst mode enable fb voltage v bufb vcc=10.5v 0.9 1.0 1.1 v burst mode enable s_s voltage v buss vcc=10.5v,vfb=0v 2.5 3.0 3.5 v burst mode enable delay time t budt vcc=10.5v,vfb=0v - 0.5 - ms burst mode frequency f bu vcc=10.5v,vfb=0v 32 40 48 khz current limit(self-protection)section peak current limit(1) i over - 3.52 4.0 4.48 a burst mode peak current limit i bu_pk - 0.45 0.6 0.75 a total device section start up current i start v cc =vstart-0.1v - 40 80 ua operating supply current (2) i op vfb=gnd, v cc =16v -915ma i op(min) vfb=gnd, v cc =12v i op(max) vfb=gnd, v cc =27v
FS8S0765RCB 7 typical performance characteristics (these characteristic graphs are normalized at ta= 25 c) -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 start up current vs temp. temperature[ ] -40-20 0 20406080100120140160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 operating supply current vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 start threshold voltage vs temp. temperature[ ] -40-20 0 20406080100120140160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 stop threshold voltage vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 initial freqency vs temp. normalized to 25 temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 maximum duty cycle vs temp. temperature[ ] figure 1. start up current vs. temp. figure 2. operating supply current vs. temp. figure 3. start threshold voltage vs. temp. figure 4. stop threshold voltage vs. temp. figure 5. initial freqency vs. temp. figure 6. maximum duty cycle vs. temp.
FS8S0765RCB 8 typical performance characteristics (continued) (these characteristic graphs are normalized at ta= 25 c) -40 -20 0 20 40 60 80 100 120 140 160 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 normalized to 25 feedback offset voltage vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 shutdown delay current vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 shutdown feedback voltage vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 softstart voltage vs temp. temperature[ ] normalized to 25 -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 over voltage protection vs temp. normalized to 25 temperature[ ] figure 7. feedback offset voltage vs. temp. figure 9. shutdown delay current vs. temp. figure 10. shutdown feedback voltage vs. temp. figure 11. soft start voltage vs. temp. figure 12. over voltage protection vs. temp. -40-20 0 20406080100120140160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 feedback sink current vs temp. temperature[ ] figure 8. feedback sink current vs. temp.
FS8S0765RCB 9 typical performance characteristics (continued) (these characteristic graphs are normalized at ta= 25 c) -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 normal mode regulation voltage vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.8 0.9 1.0 1.1 1.2 1.3 1.4 normalized to 25 feedback sink current vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 burst mode low threshold voltage vs temp. temperature[ ] -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 burst mode high threshold voltage vs temp. temperature[ ] figure 13. normal mode regulation voltage vs. temp. figure 15. feedback sink current vs. temp. figure 16. burst mode low threshold voltage vs. temp. figure 17. burst mode high threshold voltage vs. temp. -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 burst mode enable fb voltage vs temp. temperature[ ] figure 18. burst mode enable voltage vs. temp. -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 peak current limit vs temp. temperature[ ] figure 14. peak current vs. temp.
FS8S0765RCB 10 typical performance characteristics (continued) (these characteristic graphs are normalized at ta= 25 c) -40 -20 0 20 40 60 80 100 120 140 160 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 normalized to 25 burst mode peak current vs temp. temperature[ ] figure 19. burst mode peak current vs. temp.
FS8S0765RCB 11 functional description 1. 1. 1. 1. start up : to guarantee stable operation of the control ic, FS8S0765RCB has uvlo circuit with 6v hysteresis band. figure 1 shows the relation between the sup- ply current (icc) and the supply voltage (vcc). before vcc reaches 15v, the fps consumes only startup current of 80 a, which is usually provided by the dc link through start-up resistor. when vcc reaches 15v, the fps begins operation and the operating current increases to 15ma as shown. once the control ic starts operation, it continues its normal operation until vcc goes below the stop voltage of 9v figure 1. strat up with hysteresis 2. feedback control : FS8S0765RCB employs primary side regulation, which permits elimination of feedback circuit components in the secondary side such as opto coupler and tl431. figure 2 shows the primary side control circuit. the primary side regulation voltage (vpsr) is controlled to the breakdown voltage of zener diode (dz). because current mode control is employed, the drain current of the power mosfet is limited by the inverting input of pwm compara- tor (vfb*). when mosfet turns on, usually there exists high current spike in the mosfet current caused by pri- mary-side capacitance and secondary-side rectifier reverse recovery. in order to prevent premature termination of the switching pulse due to the current spike, the fps employs leading edge blanking (leb). the leading edge blanking cir- cuit inhibits the pwm comparator for a short time after the mosfet is turned on. figure 2. primary side control circuit 3. protection function : FS8S0765RCB has 4 self protective functions such as abnormal over current protec- tion (aocp), over load protection (olp), over voltage pro- tection (ovp) and thermal shutdown (tsd). because these protection circuits are fully integrated into the ic without external components, the reliability can be improved without cost increase. in the event of these fault conditions, the fps enters into auto-restart operation. once the fault condition occurs, switching operation is terminated and mosfet remains off, which forces vcc to be reduced. when vcc reaches 9v, the protection is reset and the supply current reduces to 80 ua. then, vcc begin to increase with the cur- rent provided through the start-up resistor. when vcc reaches 15v, the fps resumes its normal operation if the fault condition is removed. in this manner, the auto-restart alternately enables and disables the switching of the power mosfet until the fault condition is eliminated as illustrated in figure 3. figure 3. auto restart operation after protection 3.1 abnormal over current protection (aocp) : when the secondary rectifying diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow during the leb time. therefore, the abnormal over current protection (aocp) block is added to ensure the reliability as shown in figure 4. it turns off the sensefet within 300ns after the abnormal over current condition is sensed. figure 4. aocp block vstop=9v vstart= 1 5v 80ua ovp vcc icc 1 5ma 4 osc vcc vref 2ua 0.9ma v sd r 2.5r fb gate driver olp d1 d2 vfb* vfb cfb d z r z v psr tim e tim e v v 1 5v 9v vcc vds prote ction is activa te d (ocp,olp,ovp or tsd) au to re sta rt vcc gate dri ver aocp comp. vs ens e : 1v sensefet s q' r ovp olp tsd uvlo pwm comp
FS8S0765RCB 12 3.2 over load protection (olp) : when the load current exceeds a pre-set level for longer than pre-determined time, protection circuit should be activated in order to protect the smps. because of the pulse-by-pulse current limit capability, the maximum peak current through the smps is limited, and therefore the maximum input power is restricted with a given input voltage. if the output consumes beyond this maximum power, the output voltage together with pri- mary side regulation voltage decrease below the set voltage. this reduces the current through primary side regulation transistor, which increases feedback voltage (vfb). if vfb exceeds 2.7v, d1 is blocked and the 2ua current source starts to charge cfb slowly compared to when the 0.9ma current source charges cfb. in this condition, vfb continues increasing until it reaches 7.5v, and the switching operation is terminated at that time as shown in figure 6. the delay time for shutdown is the time required to charge cfb from 2.7v to 7.5v with 2ua. figure 5. the waveforms at the olp and auto restart figure 6. over load protection 3.3 over voltage protection (ovp) : in case of malfunc- tion in the primary side feedback circuit, or feedback loop open caused by a defect of solder, the current through pri- mary side control transistor becomes almost zero. then, vfb climbs up in a similar manner to the over load situation, forc- ing the preset maximum current to be supplied to the second- ary side until the over load protection is activated. because energy more than required is provided to the output, the out- put voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side. in order to prevent this situa- tion, an over voltage protection (ovp) circuit is employed. when the vcc voltage touches 37v, the ovp block is acti- vated. 3.4 thermal shutdown (tsd) : the sensefet and the control ic are built in one package. this makes it easy for the control ic to detect the heat generation from the sensefet. when the temperature exceeds approximately 160 c , the thermal shutdown is activated. 4. soft start : figure 7 shows the soft start circuit. during the initial start up, the 0.9 ma current source leaks out through css and rss. as css is charged, the leakage current decreases. therefore, by choosing much bigger css than cfb, it is possible to increase the feedback voltage slowly forcing the sensefet current to increase slowly. after css reaches its steady state value, d3 is blocked and the soft switching circuit is decoupled from the feedback circuit. if the value of css is too large, there is possibility that vfb increases to 7.5v activating the over load protection during soft start time. in order to avoid this situation, it is recom- mended that the value of css should not exceed 100 times of cfb. figure 7. the circuit for the soft start 5. synchronization : in order to reduce the effect of switch- ing noise on the screen, the smps for monitor synchronizes its switching frequency to an external signal, typically the horizontal sync flyback signal. the switching frequency of the fps can vary from 20 khz to 150 khz according to the time time v v 1 5v 9 v vcc vds ov er l oad prot ect i on auto restart time v 7.5v vfb 22v v v v v fb fb fb fb t t t t 2.7v 2.7v 2.7v 2.7v 7.5v 7.5v 7.5v 7.5v over load protection over load protection over load protection over load protection t t t t 1 2 1 2 1 2 1 2 = cfb*(7.5-2.7)/i = cfb*(7.5-2.7)/i = cfb*(7.5-2.7)/i = cfb*(7.5-2.7)/i delay delay delay delay t t t t 1 1 1 1 t t t t 2 2 2 2 g at e driver osc 4 voffs et 2.5r r pwm comp. 2ua 0.9ma cfb d s 5 vref FS8S0765RCB FS8S0765RCB FS8S0765RCB FS8S0765RCB 50k cs s rs s d3
FS8S0765RCB 13 external sync signal. the internal sync comparator detects the sync signal and determines the sensefet turn-on time. the sensefet is turned on at the negative edge of the sync comparator output. the reference voltage of the sync com- parator is an inverted saw tooth with a base frequency of 20khz and a varying range between 5.8v and 7.2v, as shown in the figure 8. the inverted saw tooth reference gets rid of the excessive switching noise at the first synchronized turn-on. the external sync signal is recommended to have an amplitude higher than 4.2v. figure 8. the circuit for the synchronization with external sync 6. burst mode operation : in order to minimize the power dissipation at standby mode, FS8S0765RCB has a burst mode operation. in burst mode, the fps reduces the effective switching frequency and output voltage. the fps enters into burst mode when the voltage of the soft start pin is higher than 3v, no sync signal is applied and the feedback voltage is lower than 1v. during the burst mode operation, vcc is hys- teresis controlled between 11v and 12v. once the fps enters into burst mode, it stops switching operation until vcc drops to 11v. when vcc reaches 11v, the fps starts switch- ing with switching frequency of 40khz and peak mosfet current of 0.6 a until vcc reaches 12v. when vcc reaches 12v, the switching operation is terminated again until vcc reduces to 11v. figure 9 shows operating waveforms. the soft start during the initial start-up is shown in the section 1. during this period, there is no external sync signal and the switching frequency is 20khz. the section 2 represents the normal mode operation. the switching frequency is synchro- nized with the external sync signal. in the section 3, the external sync signal is removed. however, the load still exists and thus the feedback voltage (vfb) is higher than 1v. in this period, the fps does the normal switching operation with switching frequency of 20khz. the section 4 and 5 show the burst mode operation. at the end of the section 3, the load is eliminated and the feedback voltage (vfb) drops below 1v forcing the fps to stop switching operation. dur- ing the section 4, vcc goes down to 11v. during section 5, vcc is hysteresis controlled between 11v and 12v. when the external sync signal is applied on the pin 5, the fps resumes its normal operation. in order to minimize the power con- sumption in standby mode, it is recommended to set the value of vcc during normal operation as high as possible (about 29v). figure 9. the operation of the FS8S0765RCB at the nor- mal mode and the off mode gate driver osc 4 voffset 2.5r r pwm comp. 2ua 0.9ma cfb d s 5 vref css rss d3 FS8S0765RCB FS8S0765RCB FS8S0765RCB FS8S0765RCB 5 sync comp. 7.2v 5.8v external external external external sync sync sync sync time v v 1 5v 9v vcc vds v 5v 3v vsync v 1 v vfb 1 2v 11 v section i section 2 section 3 section 4 section 5 section 6 vcc
FS8S0765RCB 14 typical application circuit 1. 80w universal input power supply for crt monitor 2. transformer schematic diagram r203 0.7k + c202 22uf/160v r202 4k + c203 47uf/100v + c205 1000uf/25v d102 c107 10nf/630v d202 50v c302 4.7nf r101 56k/2w t1 14 15 16 4 3 2 1 12 10 11 6 8 13 9 7 c111 0.1uf 0 d103 0.1uf d201 -+ bd101 1 2 3 4 + c207 1000uf/25v hsync_o + c208 1000uf/25v + c204 47uf/100v regulator ouput_5v c113 1uf rt101 1n4148 1 2 off signal l202 ic101 FS8S0765RCB 4 3 2 1 5 vfb vcc gnd drain s/s + c112 47uf/16v d203 r105 560 c102 100nf r103 600k micro controller sync trans r106 100 c103 4.7nf line filter: lf101 -14v l205 + c209 1000uf/16v c105 100nf 0 l201 c301 4.7nf 14v c101 tnr d205 d204 + c106 220uf/400v 80v + c108 22uf/50v zd101 6.2vzd dc5v ksc945 r102 3.3 l203 on --> normal mode: off --> off mode c109 47nf c115 1nf c114 1nf 6.5v f101 fuse d101 + c201 22uf/160v 0 + c210 1000uf/16v r201 0.1k c104 4.7nf + c206 1000uf/25v r104 2.2k + c110 1uf/50v l204 2n3904 lm : 420uh 1 4 6 7 16 np : 40t nvcc : 12t nvo1 : 10t 15 14 13 12 11 10 9 nvo2 : 22t nvo3 : 6t nvo4 : 5t nvo5 : 3t 8 nreg : 3t
FS8S0765RCB 15 3.winding specification 4.electrical charateristics 5. core & bobbin core : eer 3540 bobbin : eer3540 ae(mm2) : 107 no pin (s f) wire turns winding method np1 4 10.3 1 40 solenoid winding insulation: polyester tape t = 0.050mm, 2layers nvo1 16 15 0.3 1 10 center winding insulation: polyester tape t = 0.050mm, 2layers nreg 7 80.2 1 3 solenoid winding insulation: polyester tape t = 0.050mm, 2layers nvo2 14 13 0.3 3 22 center winding insulation: polyester tape t = 0.050mm, 2layers np2 4 10.3 1 40 solenoid winding insulation: polyester tape t = 0.050mm, 2layers nvo3 12 90.3 2 6 solenoid winding insulation: polyester tape t = 0.050mm, 2layers nvo4 9 11 0.3 1 5 solenoid winding insulation: polyester tape t = 0.050mm, 2layers nvo5 10 90.3 2 3 solenoid winding insulation: polyester tape t = 0.050mm, 2layers nvcc 6 80.2 1 12 solenoid winding outer insulation: polyester tape t = 0.050mm, 2layers pin specification remarks inductance 1 - 4 420uh 10% 300khz, 1v leakage inductance 1 - 4 5uh max 2 nd all short
FS8S0765RCB 16 6.demo circuit part list part value note part value note fuse c201 22nf/160v electorlytic capacitor f101 3a/250v - c202 22nf/160v electorlytic capacitor ntc c203 47nf/100v electorlytic capacitor rt101 10d-9 - c204 47nf/100v electorlytic capacitor resistor c205 1000nf/25v electorlytic capacitor r101 56k 2w c206 1000nf/25v electorlytic capacitor r102 3.3 1/4w c207 1000nf/25v electorlytic capacitor r103 600k 1w c208 1000nf/25v electorlytic capacitor r104 2.2k 1/4w c209 1000nf/25v electorlytic capacitor r105 0.56k 1/4w c210 1000nf/25v electorlytic capacitor r106 0.1k 1/4w c211 0.1uf/50v ceramic capacitor r201 0.1k 1/4w c301 4.7nf ac filter capacitor r202 4k 1/4w c302 4.7nf ac filter capacitor r203 0.7k 1/4w sync trans 22mh inductor l201 ~ l205 13uh diode d101 uf4007 capacitor d102 tvr10g c101 471d10 tnr d103 tvr10g c102 100nf box capacitor d201 uf4007 c103 4.7nf ac filter capacitor d202 uf5404 c104 4.7nf ac filter capacitor d203 uf5402 c105 100nf box capacitor d204 uf5402 c106 220uf/400v electorlytic capacitor d205 uf5401 c107 10nf/630v caramic capacitor c108 22uf/50v electorlytic capacitor bd101 kbl406 bridge diode c109 47nf/50v caramic capacitor line filter c110 1uf/50v electorlytic capacitor lf101 24mh c111 0.1uf/50v caramic capacitor ic c112 47uf/50v electorlytic capacitor ic101 fs8s0765rc (7a, 650v) c113 1uf/50v electorlytic capacitor ic201 ksc945 npn transistor c114 1nf/50v caramic capacitor c115 1nf/50v caramic capacitor
FS8S0765RCB 17 package dimensions to-220-5l
FS8S0765RCB 18 package dimensions (continued) to-220-5l(forming)
FS8S0765RCB 19 ordering information tu : non forming type ydtu : forming type product number package marking code bvdss rds(on)max. FS8S0765RCBtu to-220-5l 8s0765rcb 650v 1.6 FS8S0765RCBydtu to-220-5l(forming)
FS8S0765RCB 8/25/03 0.0m 001 stock#dsxxxxxxxx ? 2003 fairchild semiconductor corporation life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.

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